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Standards in Design Automation of Electronic Systems

Summer School

Prague, July 8-13, 1996

organised by
BENEFIT project, ECSI, IRESTE

Objectives
Venue
Programme
Participation

Objectives

Standards play an important role as means to transfer new technologies to manufacturing. They promote re-use of designs of existing electronic systems and components. Thus, they enable increase in productivity. Standards are also a universal platform facilitating collaboration among industrial partners, and between research groups and industry. Here, the mission of the BENEFIT project, which has been recently launched by the Commission of the European Union with the aim to stimulate East-West European co-operation between universities and industry, meets the objectives of ECSI - European CAD Standardisation Initiative. The program of the school will cover state-of-the-art standards in Electronic Design Automation (EDA). Compact courses are foreseen to present main EDA industry accepted design and modelling languages, electronic data and documentation interchange formats, and main standards in testing. Further, the school will build an awareness about: emerging standards, like OMF - Open Model Forum, accompanying standards, like synthesis package for VHDL, and in addition it will overview these dynamically developing EDA domains, which are mature and require standardisation actions. Leading experts and main actors in the EDA standardisation scene will be giving lectures.

The school is organised primarily for engineers, researchers, and decision makers as an intensive course including exercises and "hands-on" demonstrations of relevant software. The event is sponsored by the European Commission through the BENEFIT project (COPERNICUS CA 0536), and is organised in co-operation with ECSI and IRESTE (University of Nantes). It builds also upon the results of the ESPRIT project 8370 - ESIP.

Venue

The school will be held at the Czech Technical University in Prague during the second week of July, 1996. 7-8 hours of lectures, and 2 hours of classes are foreseen for each day in average. Lectures will be given at the Technical University building located at Karlovo Namesti (Charles Square) in the heart of the city. Prague is really a marvellous place not only for a course. Want to surf from Charles Square to Charles bridge? http://sunsite.mff.cuni.cz/prague/Index.html

Location:

Czech Technical University, building E
Karlovo namesti 13
Prague 2
Czech Republic
phone: (+42 2) 293485
fax : (+42 2) 298098
Access by public transport:
Underground line B, stop "Karlovo namesti", exit "Karlovo namesti" or
tram lines 3, 4, 14, 16, 18, 22, 24, 34, stop "Karlovo namesti"

Programme

Sunday - 7 July

Registration office will be opened from 16:00 till 20:00 at hotel Krystal, Jose Marti street 2,
Prague 6 - Veleslavin
18:00 Invitation reception

Monday - 8 July

Registration office will be opened from 8:30 at University building E, Karlovo namesti 13, Prague 2

9:30-10:00 Opening of the school

Welcome address - Adam Pawlak
IRESTE/Univ. of Nantes, France

Welcome address - Michal Servit
CTU Prague, Czech Republic

Welcome address in the name of
the Czech Technical University


10:00-12:30
The EDA standards environment
Ron Waxman, Univ. of Virginia, Virginia, USA
John Teets CFI, Inc., EDA Industry Council, USA

12:30-14:00 Lunch break

14:00-15:00
The European Policy and EDA Standards: OMI
Veronique Pevtschin, European Commission, Brussels

15:00-16:00
The European CAD Standardization Initiative
Jean Mermet, ECSI and TIMA, Univ. J. Fourier, France

Coffee break

16:30-19:30
VHDL96
Jacques Rouillard, ESIM, France

Dinner

Tuesday - 9 July

9:00-12:30
VERILOG
Bill Fuchs, Open Verilog International, USA
Michael Ciletti, Univ. of Colorado at Colorado Springs, USA

12:30-14:00 Lunch break

14:00-16:30
VITAL: The VHDL-based Methodology for Building Libraries of ASIC Models
Victor Berman Cadence, USA

Coffee break

17:00-19:00
The Open Model Forum and IBIS
Will Hobbs, Stephen Peters, Intel Corp., USA

Dinner

Evening Demos

Wednesday - 10 July

9:00-11:00
Component Modelling Conventions and Standards
Peter Sinander, European Space Agency, The Netherlands

Coffee break

11:30-12:30
Analog and Mixed-Signal Extensions to VHDL
Alain Vachoux, EPFL, Lausanne, Switzerland

12:30-14:00 Lunch break

14:00-15:30
Analog and Mixed-Signal Extensions to VHDL (cont'd)
Alain Vachoux, EPFL, Lausanne, Switzerland

16:00
Visiting Prague (guided tour will start at 16:00 from
the University building E, Karlovo namesti 13, Prague 2)

19:00
Reception, Restaurant "Na Orechovce", Vychodni 7, Prague 6

Thursday - 11 July

9:00-12:30
EDIF and PCB Standards
Hilary Kahn, Univ. Manchester, UK

12:30-14:00 Lunch break

14:00-17:00
VHDL Synthesis and the IEEE 1076.3 Standard
Alexander Zamfirescu VeriBest Inc., USA

Coffee break

17:30-19:00
Technical Committee 93 of the IEC: Electronic Design Automation Standards
Sylvie Lasserre, Jean Lebrun, Thomson-CSF TTM, Orsay, France

Component Information Representation: the CIREP project
Sylvie Lasserre, Jean Lebrun, Thomson-CSF TTM, Orsay, France

Standards in Design Automation of Electronic Systems: Where is Russia Going?
Nikolai Vitsyn, Russia

Friday - 12 July

9:00-12:30
An Overview of Standards in Testing of Electronic Systems
Adam Osseiran, Engineering School of Geneva, Switzerland

12:30-14:00 Lunch break

14:00-17:00
The Electronic Data Book - Pinnacles
Alfred Elkerbout, Philips Semiconductors, The Netherlands
Bob Yencha, National Semiconductor, Portland, USA

Coffee break

17:00-19:00 Demos

Saturday - 13 July

9:00-12:00
Information Modelling Applied to EDA Standards - EXPRESS
Hilary Kahn, Univ. Manchester, UK

Coffee break

9:00-13:00 Demos

13:00
Summarizing Remarks and Closing of the School
Jean Mermet, ECSI and TIMA, Univ. J. Fourier, France

Participation

Candidates have to apply for admittance in the school by sending an application explaining motivation and background. Additional references are welcome. The application can be sent either to Internet addresses: apawlak@ireste.fr and ecsi@grenet.fr, or to the postal address:

ECSI
Equation, 2 avenue de Vignate
38610 Gieres, France
fax: +33 76 42 87 87

Attendance in the school is free but upon an invitation only. Accepted candidates will pay the costs of accommodation and living. Participants from Balitic countries, Russia, Ukraina, Romania may apply for GRANTS. Participation in the school includes: attendance at courses, classes and demonstrations. Additional documentation on EDA standards will be available at the cost of copying. The program of the school will include a reception on Sunday evening, and a social event on Wednesday afternoon.

Special very favourable prices have been negotiated between Organizers and the Krystal Hotel:
double room for 940.- Kc/night (i.e. 470.- Kc per participant/night) and single room for 700.- Kc/night
All prices include breakfast. The exchange rate is approx.: 27.90 Kc = 1 US$.

The hotel Krystal is situated not far from the town centre. Public transport is within walking distance. Each room has its own bathroom. A stylish restaurant and the Lobby Bar provide pleasant surroundings for meals and social contacts. Meals are served in a dining room with 160 seats.
(Krystal Hotel, J. Martiho street 2/407, P.O. Box 179, CZ-160 41 Prague - Veleslavin, phone: (+42 2) 3162761, fax: (+42 2) 3164215)

The Organizers expect that the vast majority of participants will be accomodated in double rooms because there is only a limited number of single rooms available.

School Directors:
Jean Mermet
ECSI
ecsi@grenet.fr
Adam Pawlak
Benefit/IRESTE
apawlak@ireste.fr

Organising Chairman:

Michal Servit
Czech Technical University
Dept. of Computers, Karlovo nam. 13
CZ-121 35 Prague 2, Czech Republic
e-mail: servit@cs.felk.cvut.cz fax: (+42 2) 298 098 tel: (+42 2) 2435 7473


AP